The easy way is to check the incrementing the eax register:
The problem is much more complex if we are to discuss the subject.
Let’s see the source code:
1 2 3 4 5 | xor EAX, EAX inc EAX nop jz x64 jnz x86 |
The x64 and x86 are symbols.
The source code shows us the algorithm:
- recall correctly the EAX with xor ;
- try to incrementing the EAX with inc and nop ( the nop – a command that does nothing, in this case, will use the addressing mode to test with jz and jnz ) ;
- if not then EAX cannot be increment ( the inc instruction increments the contents of its operand by one the result will jump at x86 source code area, ZF =0 ) ;
NOTE: If you tell me this solution is full of problems then I agree with you (see: inc sets ZF if the value of cl after the increment is zero). There is also the possibility to test the processor directly. This source code just shows a simple model of CPU capability testing.